Molded high impedance surface and a method of making same

ABSTRACT

A high impedance surface and a method of making same. The surface includes a molded structure having a repeating pattern of holes therein and a repeating pattern of sidewall surfaces, the holes penetrating the structure between first and second major surfaces thereof and the sidewall surfaces joining the first major surface. A metal layer is put on said molded structure, the metal layer being in the holes, covering at least a portion of the second major surface, covering the sidewalls and portions of the first major surface to interconnect the sidewalls with other sidewalls via the metal layer on the second major surface and in the holes.

TECHNICAL FIELD

[0001] This invention improves upon current techniques for manufacturinghigh impedance surfaces which surfaces are also known as resonanttextured ground planes or a “Hi-Z” surfaces and which surfaces arepresently made using printed circuit board techniques. The presentinvention provides new methods of manufacturing such surfaces based onmolding and/or related techniques, and also provides several structuresthat are manufacturable using these techniques. The invention allowsHi-Z surfaces to be mass-produced more rapidly and at a lower cost thanthe prior art techniques, which primarily involve printed circuit boardtechnology. This invention also provides a Hi-Z structure in which thecapacitors are vertical, instead of horizontal, so that they may betrimmed after manufacturing, for tuning purposes.

BACKGROUND OF THE INVENTION

[0002] Recently, a new kind of electromagnetic ground plane has beendeveloped which is known as a high-impedance or Hi-Z surface. See D.Sievenpiper and E. Yablonovitch, “Circuit and Method for EliminatingSurface Currents on Metals” U.S. provisional patent application, serialNo. 60/079953, filed on Mar. 30, 1998 by UCLA and a related PCTapplication published as WO 99/50929 on Oct. 7, 1999. This prior artstructure consists of a metal ground plane covered with an array of tinyresonant cavities. These resonant cavities alter the effectiveelectromagnetic impedance of the surface, so that it appears to have ahigh impedance (>>377 ohms), instead of a low impedance (≈0 ohm) like anordinary metal surface. Because of its high impedance, the Hi-Zstructure can support a finite tangential electric field at its surface,which is not possible with a smooth metal ground plane. This texturedsurface is important for various applications in the field of antennas.In particular, it is useful for low-profile antennas because radiatingelements can be placed directly adjacent to the Hi-Z surface (i.e.spaced less than <<0.01 wavelength therefrom) without being shorted out.This provides an advantage compared to an ordinary metal ground plane,which normally requires a separation of roughly ¼ wavelength between theground plane and the antenna, resulting in antennas that are at least ¼wavelength thick. In addition to providing a way to produce very thinantennas, the Hi-Z surface also suppresses surface currents, which tendto interfere with the performance of the antenna by propagating acrossthe ground plane and radiating from edges, comers, or otherdiscontinuities. The radiation produced by these surface currentscombines with the direct radiation from the antenna, and producesripples in the radiation pattern, as well as significant radiation intothe backward direction behind the ground plane. By suppressing thesesurface currents, one can produce antennas with much smoother radiationpatterns, and with less backward radiation. In short, the antennas areboth more compact and more efficient when made with a Hi-Z surface.

[0003] The Hi-Z structure can be most easily understood by consideringthe effective circuit that describes the resonant cavities. In thestructure shown in FIG. 1, the Hi-Z surface is constructed as a latticeof overlapping “thumbtack”-like protrusions on a flat metal ground plane22. The protrusion consist of flat metal plates 10 connected to theground plane by metal plated vias 13. This prior art structure shownhere is built using printed circuit board techniques. The printedcircuit board is not shown for ease of illustration, but the flat metalplates 10 would appear on the printed circuit board's top surface whilethe ground plan 22 is disposed on its bottom surface. The capacitance ofthe structure is determined by the proximity and overlap area of themetal plates 10. The inductance is controlled by the area of the currentloop that connects adjacent plates, which is primarily determined by thethickness of the structure. The resonance frequency of the surface isthen given by $\omega = {\frac{1}{\sqrt{LC}}.}$

[0004] Near the resonance frequency, the surface has high impedance, andcan suppress the propagation of surface currents. The bandwidth of thesurface, or the frequency band where the impedance is greater than 377ohms, is given by ${BW} = {\frac{\sqrt{L/C}}{\sqrt{\mu_{o}/ɛ_{o}}}.}$

[0005] This roughly determines the bandwidth of antennas that can bebuilt on these surfaces.

[0006] Typically, in the prior art, Hi-Z surfaces are produced byprinted circuit board techniques. In order to achieve a low resonantfrequency (<10 GHz or so) in a thin structure (a few mm thick), a largeamount of built-in capacitance is required. This is accomplished using amulti-layer structure, in which the capacitors are of a parallel-plategeometry. The vias 12 are made by drilling through both boards, and thenplating the inside of the holes with metal 13. The steps taken infabrication are shown in FIGS. 2(a)-2(f). First, two printed circuitboards, one relatively thick and one relatively thin form the startingmaterials (see FIG. 2(a)). The inner layers are patterned (see FIG.2(b)), and the boards are bonded together (see FIG. 2(c)). Then holes 12are drilled through the structure to define the positions of the vias(see FIG. 2(d)). These are then plated with metal 13 (see FIG. 2(e)).Finally, the outer layers are patterned (see FIG. 2(f)). The mosttime-consuming and expensive task is drilling the vias 12. A fastcomputer-controlled drill can drill on the order of one hole per second.Typical lattice periods for these structures are on the order of ¼ inch,which means that the total drilling time can approach one hour persquare foot.

[0007] What is needed is a method of producing a similar structure byfaster and more economic techniques, in which the holes do not need tobe drilled individually, but instead can be produced en masse by someother technique. This invention provides techniques for producing such astructure by molding, as well as new geometries that are amenable tosuch manufacturing techniques. The resulting structure is less expensiveand less time-consuming to fabricate. Furthermore, it has the additionalbenefit that certain embodiments thereof can be tuned after fabricationto adjust for variations in the manufacturing process. This feature alsoallows a single mold to be used to build structures with slightlydifferent resonant frequencies.

BRIEF DESCRIPTION OF THE INVENTION

[0008] The present invention provides a Hi-Z surface that can beproduced by injection molding, which permits large areas to be producedrapidly and at a low cost. Additionally, certain embodiments of thestructure are also technically superior in that they can be tuned aftermanufacturing, to adjust for variations in the manufacturing process,thus allowing a single mold to be used for structures with slightlydifferent resonance frequencies, and/or allowing different areas of asingle Hi-Z surface to be tuned to different resonance frequencies.

[0009] In one aspect the present invention provides a method of making ahigh impedance surface comprising the steps of: molding a structure froma dielectric material to form the structure, the structure having aplurality of holes therein and a plurality of ridges on at least onemajor surface of the structure, the ridges having sidewalls; plating thestructure, including the interiors of the holes therein and thesidewalls, with a layer of metal; removing at least a portion of thelayer of metal which bridges across the ridges to thereby definecapacitor plates on the sidewalls.

[0010] In another aspect the present invention provides a method ofmaking a high impedance surface comprising the steps of: molding astructure from a dielectric material to form the structure, thestructure having a plurality of holes therein and a plurality oftrenches on at least one major surface of the structure, the trencheshaving sidewalls and bottom walls; and plating the structure, includingthe interiors of the holes therein and the sidewalls, but not the bottomwalls of the trenches, with a layer of metal.

[0011] In still yet another aspect the present invention provides amethod of making a high impedance surface comprising the steps ofmolding a structure from a dielectric material, the structure having afirst major surface, a second major surface, a plurality of holes whichpenetrate both major surfaces, and a plurality of sidewall features onthe first major surface; and applying at least one metal layer to thestructure in the interiors of the holes therein, on the sidewallfeatures, and on the second major surface, the at least one metal layerson the sidewall features defining plates of capacitors which areconnected to neighboring plates of capacitors via the at least one metalplate in the holes and on the second major surface.

[0012] In still yet another aspect the present invention provides amethod of making a high impedance surface comprising the steps ofmolding a structure from sheet metal, the structure having a pluralityof openings therein with confronting sidewalls on the sides of theopenings, the structure also having a plurality of protrusionsprojecting from a major surface thereof; and joining the structure toadditional sheet metal such that ends of the protrusions remote from themajor surface are coupled to the additional sheet metal.

[0013] In yet another aspect the present invention provides a highimpedance surface comprising a molded structure having a repeatingpattern of holes therein and a repeating pattern of sidewall surfaces,the holes penetrating the structure between first and second majorsurfaces thereof and the sidewall surfaces joining the first majorsurface; and a metal layer on the molded structure, the metal layerbeing disposed in or filling the holes, covering at least a portion ofthe second major surface, covering the sidewalls and portions of thefirst major surface to interconnect the sidewalls with other sidewallsvia the metal layer on the second major surface and in the holes.

BRIEF DESCRIPTION OF THE DRAWINGS

[0014]FIG. 1 depicts a prior art Hi-Z surface;

[0015] FIGS. 2(a)-2(f) depict the manufacturing steps used in making aprior art Hi-Z surface;

[0016]FIG. 3(a) is a side sectional view through a structure which actsas a form for making a Hi-Z surface in accordance with the presentinvention, the section line therefor being shown in FIG. 3(b);

[0017]FIG. 3(b) is a plan view of the structure shown in FIG. 3(a);

[0018] FIGS. 4(a)-4(c) show the structure of FIGS. 3(a) and 3(b) beingcovered by a metal and then the metal being partially removed to definethe capacitor plates;

[0019]FIG. 4(d) shows the embodiment of FIG. 4(b) with an addedplanarization layer;

[0020]FIG. 4(e) depicts an alternative embodiment wherein the opposingcapacitor plates formed on the sidewalls are non-parallel;

[0021] FIGS. 5(a)-5(f) depict another embodiment of a Hi-Z surface;

[0022] FIGS. 6(a)-6(e) depict still another embodiment of a Hi-Zsurface; and

[0023] FIGS. 7(a)-7(d) depict yet another embodiment of a Hi-Z surface.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT AND ALSO OF ALTERNATIVEEMBODIMENTS

[0024] A preferred embodiment of the present invention will now bedescribed with reference to FIGS. 3(a) and 3(b) and FIGS. 4(a)-4(e).FIG. 3(a) is a cross section view through structure 11 as marked bysection line 3(a) noted on FIG. 3(b). FIGS. 4(a)-4(e) are also sectionviews taken along the same section line done for FIG. 3(a) but at laterpoints in the fabrication of the high impedance surface of the presentinvention.

[0025] In this embodiment a form or structure 11 is fabricated bymolding and the form 11 is subsequently plated with metal and the metalis partially removed to define the capacitor structures. The form orstructure 11 is preferably made by injection molding, in which a mold isfilled with a liquid dielectric material, which then hardens into asolid cast which is removed from the mold. This dielectric material ispreferably either a thermoplastic, which is melted and then injectedinto the mold and allowed to harden, or a thermoset resin, which ismixed in liquid form from two reagents, injected into the mold, and thenallowed to harden. The procedure for molding resins is known to thoseskilled in the art of injection molding and therefor is not discussed infurther detail here. Important features of the molded structure 11 ofthis embodiment of the invention include pre-formed holes or vias 12,which can all be produced in the single molding step, and verticalraised projections or ridges 14 that will form a structure forsupporting the plates of the capacitors. These projections or ridges 14may be optionally recessed into the structure 11 by using a trench 16 asshown in FIG. 3(a). The sidewalls 15 of the ridges 14 may be parallel toeach other in this embodiment so the capacitors which will be formedthereon will then have parallel plates. As will be seen, the sidewalls15 can alternatively be trapezoidal in cross section in order to fromnon-parallel plate capacitors.

[0026] The trenches 16 in this embodiment are optional and are used tomake the structure 11 as thin as reasonably possible. The trenches 16allow some or all of the capacitors to be recessed somewhat into thestructure 11. If not for the trenches 16, the entire length of eachcapacitor would extend above the top major surface of the depictedstructure and the height of the structure 11 would be taller. As such,the trenches 16 help make the structure 11 thinner.

[0027] The resulting structure 11 includes a grid of projections orridges 14, which may be square shaped, when viewed in plan view (seeFIG. 3(b)), or the grid may be hexagonal, triangular, or have any otherdesired shape or pattern when viewed in plan view. Moreover, theprojections or ridges 14 may have parallel sidewalls 15 as depicted inFIGS. 3(a) and 3(b) or may have somewhat non-parallel sidewalls to easeremoval of the structure 11 from its mold. The ridges 14 form cells 20and each cell surrounds a region containing: (i) a hole or via 12 thatextends to the back side 22 of the structure 11 and (ii), in thedepicted embodiment, four adjacent sidewalls 15. In FIGS. 3(a) and 3(b)only nine complete cells 20 are shown, but it is to be understood that acomplete structure 11 would normally comprise hundreds or thousands oreven more of such cells 20. Each cell 20 will help define one of theplates 18 (see FIG. 4(b) of four capacitors (an electrically equivalentcapacitor C is depicted in phantom in FIG. 3(b)) associated with eachvertical connection 13 to be formed in the hole or via 12 of theresulting Hi-Z surface.

[0028] Turning now to FIG. 4(a), after the structure 11 of FIGS. 3(a)and 3(b) has been formed, preferably by molding, it is plated with thinlayer of metal 24, preferably copper. The copper may be coated withanother metal such as nickel, tin, or gold to provide corrosionresistance, if desired.

[0029] Preferably, the entire exterior surface of structure 11 isplated, including the back side 22, the holes 12, and the features 14,16 on the front side thereof with metal 24. The thickness of metal 24 isnot critical and might typically be 50 μm or so. The metal that isplated inside the holes 12 creates vertical connections 13 between themetal on the back side 22 (which will form a ground plane) and thecapacitor plates to be defined on the sidewalls 15 of each cell 20 (seeFIG. 3(b)). The vertical connections 13 are used to suppress surfacewaves is certain embodiments. Those skilled in the art will appreciatethe fact that the vertical connections 13 can sometimes be omitted andin such embodiment the holes 12 can be omitted. The metal that is platedon the sides 15 of the vertical ridges 14 forms vertical capacitorplates 18. The dielectric of the ridges 14 forms the insulator for thecapacitors. If the holes 12 have a sufficiently small diameter, thevertical connections 13 may completely fill holes 12.

[0030] The next fabrication step is to pass the structure through aplaning device, which removes or planes off the tops of the projectionsor ridges 14 as can be seen in FIG. 4(b). This action removes the metalconnections or bridges 26 (see FIG. 4(a)) at the tops of the ridges 14and between adjacent cells 20, so that the plates 18 of the individualcells 20 are now electrically coupled by the metal plating 13 in holes12 only to the lower metal surface 28. This step is important for thecreation of the capacitors and it also provides tunability to thestructure, since the capacitors can be planed to a desired depth, whichdetermines the resonance frequency of the resulting structure. Also,assuming that the structure is not planed to too great a depthinitially, the technique of removing the tops of the ridges 14 allowsfor fine-tuning the capacitance of the resulting structure after otherfabrication steps have been performed to correct for variations inmanufacturing tolerances. Furthermore, different areas of the surfacecan be optionally planed to different depths, to create a surface withareas having different resonance frequencies. This allows a singlesurface to be used for multiple bands of operation. As an alternative,the structure can also be planed or originally molded with a built-intaper 32, as is shown in FIG. 4(c), so that the resonance frequencyvaries smoothly across the surface where such a taper is provided. Inthis embodiment each capacitor ridge 14 has a slightly different averageheight compared to its neighbors. This makes the resonant ground planesurface useful for broadband operation by feeding various areas of thesurface with different antennas according to the desired frequency ofinterest. The ability to tune the surface as a function of position mayalso have applications in producing low-angle radiation from alow-profile antenna, as energy can be coupled into surface waves, whichare then allowed to radiate off the surface after a pre-determineddistance. With any of these surfaces, the final structure may be coatedwith a dielectric layer 36 for purposes of planarization, so that thepossibly delicate fins 34 that form the capacitors are not damaged inuse. See FIG. 4(d) which shows the embodiment of FIG. 4(b) with theadded dielectric layer 36. The fins 34 may be delicate since their sizesare dictated by the frequency at which the resonant surface is to beresonant and when the resonant frequency gets into the gigahertz rangethe feature sizes of the capacitors is rather small (easily viewable bythe human eye, but sufficiently small that the fins 36 may be delicateand therefore it may be desirable to protect them from physical damage.

[0031] The embodiments depicted by FIGS. 4(b) and 4(c) both haveparallel plate 18 capacitors. As can be seen from FIG. 4(e), if theridges 14 are trapezoidal in cross section when formed, then thecapacitor plates 18 will be non-parallel. The trenches 16 may also beformed with non-parallel walls. This embodiment has the advantage thatthe structure 11 more easily releases from its mold (not shown) whenmolded. As such, non-parallel plate capacitors are preferred for ease ofmanufacturing. The amount by which the plates are non-parallel may berather slight and preferably would only be by an amount needed for easeof manufacturing since non-parallel plate capacitors tend to makedetermining the shape of the taper 32 more complicated (if a taper 32 isutilized). The use of a taper tends to reduce the capacitance towardsthe wide end of the taper thereby requiring taller capacitors incompensation therefor.

[0032] Another technique for producing a Hi-Z structure will now bedescribed with reference to FIGS. 5(a)-5(f). This embodiment involvesbuilding vertical capacitors into the structure in connection withdownward-pointing trenches 16. The trenches 16 have sidewalls 15 wherethe plates 18 of the capacitors will be formed and also have trenchbottoms 23 which will be free of metal when the Hi-Z surface of thisembodiment is completely built. In this embodiment, a structure 11 ismolded which bears some resemblance to the structure 11 of FIGS. 3(a)and 3(b). FIG. 5(a) is a cross section view taken through structure 11along section line 5(a) in the plan view depicted by FIG. 5(f). In thisembodiment there is no need for ridges 14—rather a grid of trenches 16is formed when molding the structure 11.

[0033] Turning to FIG. 5(b), a wire grid 17 is laid into the trenches 16to prevent the capacitors from being shorted out when the structure 11is coated with a layer 24 of metal. Layer 24 is preferably formed byfirst evaporating a thin metal layer 24-1 onto structure 11, coveringevery part of the surface except that which is covered by the wire grid17 as shown by FIG. 5(c). For this initial metal layer evaporation, itis preferable to evaporate a metal that has low thermal conductivity andthat can provide a base for electroplating more metal. Nickel is acommon choice for an evaporated metal. After the evaporation step, thewire grid 17 is removed. The aforementioned metal evaporation steppreferably lays down a very thin layer of metal 24-1 which will not forma connection across junctions where there is no line-of-sight from theevaporation source. Hence, the wire grid 17 will not become attached tometal 18-1 on the sidewalls 15 of the trenches 16 as long as thediameter of the wires of grid 17 is somewhat smaller than the width ofthe trenches 16.

[0034] After evaporation and wire grid removal, other metals arepreferably electroplated onto the exposed metal as shown by FIG. 5(d)forming a thicker metal layer 24 (and thicker metal 18 on the sidewallsof the trenches 16). The first metal which is preferably electroplatedto the exposed nickel (for example) layer 24-1 is a metal layer having ahigh electrical conductivity (such as copper). The exposed highconductivity metal layer (preferably copper) is then preferably coveredwith another layer that will provide corrosion resistance. Nickel, tin,or gold are common choices for metals for the corrosion resistant layer.The initial layer 24-1 and the added layers of a low thermalconductivity metal (preferably nickel), a high electrical conductivitymetal (preferably copper) and a corrosion resistance layer (preferablynickel, tin or gold) are collectively identified as layer 24 in FIGS.5(d) and 5(e).

[0035] The resulting structure of FIG. 5(d) contains the capacitorplates 18 formed from the metal coated on the sidewalls of the trenches16 as well as the vertical connections 13 formed in the vias 12. Turningnow to FIG. 5(e), trenches 19 may also built into the bottom ofstructure 11, forming an “inverse waffle” structure, which would haveimproved mechanical flexibility. In this case, the capacitors should befilled with a dielectric 21 so that their capacitance will not changewhen the Hi-Z surface is bent or flexed. This embodiment has severaldrawbacks compared to the preferred embodiments of FIGS. 3(a), 3(b) and4(a)-4(e), including lack of tunability, and sensitivity to flexingunless the air capacitors are filled with dielectric 21.

[0036] In FIGS. 5(f) only nine complete cells 20 are shown, but it is tobe understood that the structure 11 would normally comprise hundreds orthousands or more of such cells 20. Each cell 20 will help define one ofthe plates 18 of four capacitors (an electrically equivalent capacitor Cis depicted in phantom in four places in FIG. 5(f)) associated with eachvertical connection 13 of the resulting Hi-Z surface.

[0037] For the preferred embodiments of FIGS. 3(a), 3(b) and 4(a)-4(e),the capacitors are filled with a dielectric. If the dielectric isrelatively inelastic, then if the surface is bent or flexed, it is thewidth of the trenches that will change, and not the width of thecapacitors. In the case of the wire grid constructed embodiment of FIGS.5(a)-5(d), the capacitors may be only filled with air, while the rest ofthe structure is filled with dielectric. If this structure is bent orflexed, then the regions filled with the most compressible material(air) will be the regions that are deformed. This would result in alarge change in capacitance in response to bending the surface. For mostapplications, such a change in capacitance is undesirable and, for thisreason, it is usually important to fill the capacitors with anothermaterial 21 that is preferably less elastic than the plastic whichprovides the rest of the structure if (1) the structure is subject tobending or flexing and (2) having the structure change capacitance inresponse thereto would be undesirable.

[0038] Yet another embodiment of a Hi-Z structure is now described withreference to FIGS. 6(a)-6(e). This embodiment takes advantage of thefact that the capacitive metal plates of the Hi-Z surface are easy tofabricate using photolithography and standard printed circuit boardtechniques, while the vias are easy to produce en masse using injectionmolding techniques. This Hi-Z structure is made by a hybrid of twotechnologies: injection molding and printed circuit technology. Turningto FIG. 6(a), the lower part of the Hi-Z surface is a structure 11 withvias 12 is fabricated using injection molding technology. Alternativelythe vias 12 could be stamped into a substrate or formed therein using anarray of pins or drills. As is shown by FIG. 6(b), the structure 11 isthen coated with metal, preferably copper, to make the back side 22 andthe vias 12 conductive, and then patterned to remove metal from thefront side except from pads 23 adjacent vias 12 which pads 23 will beused for solder bonding. Solder is then flowed onto the front of thestructure to form solder bumps 34 on the tops of the pads 23 adjacentvias 12 (see FIG. 6(c)). A second layer of dielectric 36, which ispreferably provided by a printed circuit board 36, is patterned usingstandard photolithographic processing to pattern the metal disposedthereon as is shown by FIG. 6(d) to form an array of plates 10 a on anupper surface thereof and an array of plates 10 b on the lower surfacethereof. The structure of FIG. 6(c) and the patterned printed circuitboard 36 are aligned and the two structures 11, 36 are heated to bondthem together as is shown in FIG. 6(e). The resulting Hi-Z surface hasthe advantage that the capacitors can be easily defined byphotolithographic processing of the metal on printed circuit dielectric36, while the vias 12 can be easily formed when structure 11 is formedby injection molding. This hybrid structure takes advantage of thestrengths of each fabrication method. The final structure can later becoated with tin, nickel, or gold for corrosion resistance, if desired.

[0039] Instead of forming structure 11 by injection molding, structure11 of any of the previously described embodiments can be formed from apre-fabricated sheet of dielectric which is processed with a hot press,in which an array of hot metal pins are forced through the structure toform the holes and other surfaces are used to form any trenches orprojecting walls needed. Like injection molding, this technique has theadvantage that many holes can be formed quickly. The hot press methodhas the additional advantage that it uses a pre-formed dielectric sheet,in which the thickness can be specified very accurately.

[0040] Still another embodiment of a Hi-Z surface is now described withreference to FIGS. 7(a)-7(d). In this embodiment metal stamping is usedto make a low-cost Hi-Z surface by forming the capacitors and vias in asingle stamping process of a metal sheet 38. FIG. 7(a) depicts a moldhaving reciprocating mold surfaces 40 and 41 for forming the shape ofthe desired structure, which mold surfaces include regions 42 to shearoff certain areas of the sheet metal to help define the plates 18 of thecapacitors. The mold also includes elongated regions 44 that formvertical protrusions 45 in the sheet metal.

[0041] The mold is used to stamp the sheet 38 as shown by FIG. 7(b).This stamped sheet metal 38 is then removed from one section of the moldand applied (see FIGS. 7(c) and 7(d)) to a second flat sheet of metal39, to which it is then connected by soldering or spot welding at points46 where the two sheets meet. The completed structure can then be filledwith a dielectric for mechanical support, if desired. One cell 20 isdepicted by phantom line 20 and a typical capacitor is depicted byreference number 18. In plan view the completed structure would comprisehundreds or thousand or more of such cells. The cells 20 in thisembodiment would have a square shape in plan view, but other shapescould be used just as well as a matter of design choice.

[0042] In all of the embodiments disclosed herein, only a few capacitorsare depicted since the figures depict the structures considerablyenlarged for ease of understanding and illustration. It is to beunderstood that a typical Hi-Z surface will have hundreds, thousands oreven more capacitors. The terms ridges-and projections are used hereinsynonymously to refer to element 14.

[0043] Common reference numbers are sometimes used herein to refer toobjects which have similar features and/or functions, but which may notbe identical to each other.

[0044] Having described the invention in connection with certainpreferred embodiments thereof, modification will now certainly suggestitself to those skilled in the art. The invention is not to be limitedto the disclosed embodiments, except as is specifically required by theappended claims

1. A method of making a high impedance surface comprising the steps of:(a) forming a structure from dielectric material, the structure having aplurality of projections on at least one major surface of the structure,the projections having sidewalls; (b) plating said structure, includingsaid sidewalls, with a layer of metal; (c) removing at least a portionof the layer of metal which bridges across said projections to therebydefine capacitor plates on said sidewalls.
 2. The method of claim 1wherein the structure is formed with a plurality of holes penetratingthe structure therein and wherein the plating step includes platinginteriors of the holes.
 3. The method of claim 1 wherein the structureis made by molding and wherein the dielectric material is athermoplastic or a thermoset resin.
 4. The method of claim 1 whereintrenches are formed in said dielectric material adjacent said ridges. 5.The method of claim 1 wherein the removing step includes moving at leasta portion of at least some of said ridges.
 6. The method of claim 1wherein said ridges define a repeating geometric pattern.
 7. The methodof claim 6 wherein the repeating geometric pattern is a pattern ofsquare-shaped cells.
 8. The method of claim 1 wherein the removing stepadjusts the height of the ridges as a function of location.
 9. A methodof making a high impedance surface comprising the steps of: (a) formingdielectric material to define a structure of the dielectric material,the structure having a plurality of trenches on at least one majorsurface of the structure, the trenches having sidewalls and bottomwalls; and (b) plating said structure, including said sidewalls, but notthe bottom walls of said trenches, with a layer of metal.
 10. The methodof claim 9 wherein the structure is formed with a plurality of holestherein and wherein the plating step includes plating the interiors ofthe holes.
 11. The method of claim 10 further including the step ofinserting a plating inhibiting material adjacent the bottom walls ofsaid trenches, said step of plating inhibiting material occurring beforethe plating step is carried out.
 12. The method of claim 11 furtherincluding the step of removing the plating inhibiting material adjacentthe bottoms of said trenches after said sidewalls have been plated. 13.The method of claim 10 wherein said trenches define a repeatinggeometric pattern.
 14. The method of claim 13 wherein the repeatinggeometric pattern is a pattern of square-shaped cells.
 15. A method ofmaking a high impedance surface comprising the steps of: (a) forming astructure from a dielectric material, the structure having a first majorsurface, a second major surface, a plurality of holes which penetrateboth major surfaces, and a plurality of sidewall features on said firstmajor surface; and (b) applying at least one metal layer to saidstructure in the interiors of the holes therein, on said sidewallfeatures, and on said second major surface, the at least one metal layeron said sidewall features forming at least portions of plates ofcapacitors which are connected to neighboring plates of capacitors viathe at least one metal layer in said holes and on said second majorsurface.
 16. The method of claim 15 wherein the sidewall features aredefined by forming protruding surfaces in said first major surface. 17.The method of claim 15 wherein the sidewall features are defined byforming trenches surfaces in said first major surface.
 18. The method ofclaim 15 wherein the at least one metal layer, when first applied tosaid structure, covers said structure entirely and thereafter at leastone portion of said at least one metal layer is removed to defineindividual plates of said capacitors.
 19. The method of claim 15 whereinthe at least one metal layer when first applied to said structure doesnot cover said structure entirely and is inhibited from covering atleast portions of said structure to define thereby individual plates ofsaid capacitors.
 20. The method of claim 15 wherein said sidewallfeatures define a repeating geometric pattern.
 21. The method of claim20 wherein the repeating geometric pattern is a pattern of square-shapedcells.
 22. The method of claim 15 wherein the structure is a moldedstructure and the dielectric material is a thermoplastic or a thermosetresin.
 23. A method of making a high impedance surface comprising thesteps of: (a) forming a structure from sheet metal, the structure havinga plurality of openings therein with confronting sidewalls on the sidesof the openings, the structure also having a plurality of protrusionsprojecting from a major surface thereof; and (b) joining said structureto additional sheet metal such that ends of said protrusions remote fromsaid major surface are coupled to the additional sheet metal.
 24. Themethod of claim 23 wherein the additional sheet metal is a generallyplanar sheet metal.
 25. The method of claim 23 wherein the protrusionshave a greater depth than do the sidewalls.
 26. The method of claim 23wherein the sidewalls are spaced a distance from the additional sheetmetal.
 27. The method of claim 23 wherein the sidewalls which confrontone another are disposed parallel to each other.
 28. The method of claim23 wherein said sidewalls define a repeating geometric pattern.
 29. Themethod of claim 28 wherein the repeating geometric pattern is a patternof square-shaped cells.
 30. A high impedance surface including: (a) amolded structure having a repeating pattern of sidewall surfaces, thesidewall surfaces meeting a first major surface of said moldedstructure; and (b) a metal layer on said molded structure, the metallayer covering at least a portion of a second major surface of saidmolded structure to define a ground plane, the metal layer also coveringsaid sidewalls and at least portions of said first major surface. 31.The high impedance surface of claim 30 wherein the molded structurefurther includes a repeating pattern of holes therein, the holespenetrating the structure between the first and second major surfacesthereof, and wherein the metal layer is disposed in or fills said holesto thereby interconnect sidewalls with other sidewalls via the metallayer on said second major surface and in said holes.
 32. The highimpedance surface of claim 30 further including trenches in said firstmajor surface, the sidewall surfaces joining said first major surfacevia said trenches.
 33. The high impedance surface of claim 30 whereinsaid sidewall surfaces have a height which varies across said highimpedance surface as a function of location on said high impedancesurface.